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New Rowhammer technique against DDR5 achieves privilege escalation

by Wikdaily
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shutterstock 1887035158 hammer and nail on a wooden board


Defeating existing Rowhammer protections

Rowhammer is a method of intentionally causing disturbance errors, or bit flips, inside the tightly packed memory cells in modern DRAM chips. Since 2014, researchers have observed that rapid and repeated read operations on the same physical row of memory cells can cause electric charges to leak into adjacent rows changing the values stored in cells from 0 to 1 or the other way around. In 2015, researchers from Google showed that if performed in a controlled manner, this can have security implications, such as privilege escalation in operating systems between userspace and kernel or bypasses of process sandboxes.

Rowhammer and its various variations discovered since have primarily impacted DDR3 and DDR4 memory modules, with DDR5, a newer technology, using more sophisticated mechanisms to detect and correct disturbance errors. These mitigation mechanisms are known as Target Row Refresh (TRR) and involve detecting so-called aggressor rows that are being hammered and then refreshing the adjacent victim rows to correct any bit flips that might have occurred. TRRs are present in DDR4 as well, but in a less sophisticated and easier to defeat implementation.

TRRs are proprietary and not publicly documented, which is why previously attempted Rowhammer attacks against DDR5 had very limited success. But one Rowhammer attack dubbed Zenhammer disclosed in 2024 managed to trigger bit flips in one of 10 tested DDR5 DIMMs. By comparison, the new Phoenix attack managed to trigger bit flips in all tested DIMMs.

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